OBJECTIVE Full-time position that involves research in computer engineering (communications,
embedded security, hardware and software co-design, computation acceleration),
with a particular focus on complex distributed or embedded systems (i.e., modeling,
analysis, design, and verification)
RESEARCH
INTERESTS
modular arithmetic, cryptography and cyber security, embedded systems, digital
design, hardware-software co-design
EDUCATION George Mason University, Fairfax, Virginia USA
Ph.D., Electrical and Computer Engineering, Summer 2013 (expected) GPA: 3.75
(4.0 scale)
Thesis Proposal: Development and Benchmarking of New Hardware
Architectures for Short Digital Signature Schemes
Advisor: Professor Kris M. Gaj
Military University of Technology, Warsaw, Poland
M.S., Mathematics and Cryptology, May 2003 GPA: 4.71 (5.0 scale)
Thesis Topic: Analysis of hardware implementation of Hierocrypt-cipher using
reconfigurable devices
Advisor: Professor Piotr Bora
HARDWARE AND
SOFTWARE SKILLS Digital Design: Altera Quartus, Xilinx ISE, Aldec Active HDL, Modelsim, Actel
Libero, Synopsys Digital Compiler and Astro,
Hardware description languages: VHDL, AHDL and Verilog
Programming languages and scripting: C, C++, PHP, Perl, Python, LATEX, GNU shell
scripting, HTML
APIs and Libraries: GMP, Lidia, OpenGL
Operating Systems: Mac OSX, GNU Linux, Microsoft Windows
Utilities and Tools: Subversion, CVS, Matlab, Magma, xfig, VMware Fusion,
Parallels Desktop, BootCamp
Digital equipment: Tektronix Logic Analyzers and Oscilloscopes
AWARDS
First award in the Contest for the best MS Thesis in the area of Cryptography and
Information Security defended at a Polish university in the period 2002-2003, 7th
National Conference on Applications of Cryptography, Warsaw, Poland, 2003.
Best Paper in the category ”FPL Community Award” - FPL 10’
Best Student Paper Award - CISIM 12’
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Rogawski, p. 2 of 5
PROFESSIONAL
EXPERIENCE
George Mason University, Fairfax, Virginia, USA
Graduate Research Assistant Aug. 2009 – present
Coauthorship and the development of an open source project named:
Automated Tool for Hardware EvaluatioN (ATHENa project)
http://cryptography.gmu.edu/athena/
Hardware design and development for the evaluation of SHA-3 candidates
http://cryptography.gmu.edu/athena/index.php?id=source codes
Graduate Teaching Assistant Aug. 2008 – May. 2009
Lab Instructor for ECE 448 (FPGA and ASIC Design with VHDL)
http://ece.gmu.edu/coursewebpages/ECE/ECE448/S09/
Lab Instructor for ECE 447 (Single-Chip Microcomputers)
http://ece.gmu.edu/coursewebpages/ECE/ECE447/F08/index.php
Universite Jean Monnet, St. Etienne, France
Visiting Assistant Researcher May. 2009 – Jul. 2009
Differential Power Analysis Attack on FPGA implementation of AES crypto-core
(Altera Cyclone)
Filemedic (former MKS Company), Warsaw, Poland
Senior Software Engineer Sep. 2007 – Aug. 2008
Development and maintenance of several modules for MKS AntiVir 9.0 antivirus
software and Awangarda device: libraries for the binary unpacking (e.g. UPX),
archives extraction, and many more antivirus-engine related modules.
http://www.mks.com.pl/produkty/mks vir 9 dla windows
Asseco Poland S.A. (former Prokom Software S.A.), Warsaw, Poland
System Architect Jan. 2004 – Sep. 2007
Modules designed and developed for Nefryt IP Encryption device:
High-speed, IPSec-supporting, FPGA-based (Altera Stratix), cryptocoprocessor
in FreeScale Power PC environment (full support of PowerPC 603
interface for both master and slave configurations, crypto modules, etc)
Low-area, IPSec-supporting, FPGA-based (Altera Cyclone) modular arithmetic
and crypto-coprocessors in Renesas H8S/2300 environment.
ATmega-128-based, security system for the physical security of a computer
device (system of logs, optical, thermal and mechanical sensors, etc.)
Middleware and Low-level software supporting IPSec for uC/OS II-based
customized RTOS for Renesas H8S/2300
System Administrator Jan. 2004 – Sep. 2007
Development of the Security Hardening Guide for the Microsoft Windows 2000
operating system family (based on Common Criteria)
Administration of TEMPEST equipment
Polish Army and Polish Ministry of Defense Warsaw, Poland
2nd Lieutenent Jun. 2003 – Dec. 2003
Commanding officer of digital communication platoon.
Rogawski, p. 3 of 5
Liaison Officer to the Spanish delegation Sep. 2002
Organization of Polish Task Force for the Informal NATO Defense Ministers
Kerberos Ochrona Informacji Warsaw, Poland
IT Security Intern Jul. 2002 – Aug. 2002
LAN implementations (Firewall CheckPoint-1 and CheckPoint- NG)
Security hardening of Microsoft Windows family
IT Business Centre Warsaw, Poland
System Administrator (part-time job) Jan. 2001 – Jul. 2002
Administration of the products developed until Dec. 2001
Junior Software Engineer (part time job) Aug. 2001 – Dec. 2001
Designed and implemented several databases based on Linux, PostgreSQL,
PHP and OpenSSL (e.g.: http://gazetapraca.pl/)
Institute of Mathematics and Cryptology (at Military University of Technology),
Warsaw, Poland
Internship Jun. 2001 – Aug. 2001
Software implementation (C/C++) and evaluation of AES candidates (Rijndael,
Serpent, Mars, Twofish and RC6) DES and 3-DES
SECURITY
CLEARANCES
Certificate issued by Polish Internal Security Agency in Information Security
Certificate issued by Polish Internal Security Agency in Servicing TEMPEST
Devices
Polish Security Clearance (expired 2009) and NATO Security Clearance (expired
2009) for the level: SECRET
SERVICE
Conference reviews:
Workshop on Cryptographic Hardware and Embedded Systems CHES 2010-
2012
The Cryptographers’ Track at RSA Conference CT-RSA 2012
EUROMICRO Conference on Digital System Design 2011-2013
International Conference on ReConFigurable Computing and FPGAs ReConFig
2011-2012
International Conference on Security, Privacy and Applied Cryptography
Engineering SPACE 2012
ACM-IEEE International Conference on Formal Methods and Models for
Codesign MEMOCODE 2009
Journal reviews:
IEEE Transaction on Computers
Journal of Cryptographic Engineering
Journal of Circuits, Systems and Computers
IET Circuits, Devices and Systems
REFERENCES Available upon request.
Rogawski, p. 4 of 5
SUBMITTED
JOURNAL
PUBLICATIONS
Rogawski M. - Analysis of Implementation of HIEROCRYPT algorithm (and its
comparison to CAMELLIA algorithm) using ALTERA devices, Biuletyn WAT nr 4
(620), Apr. 2004,
Gaj K., Kwon S., Baier P., Kohlbrenner P., Le H., Khaleeluddin M., Bachimanchi R.,
Rogaw...
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